IEN1=0, STS0=0, EDGE0=00, EDGE1=00, STS1=0, IEN0=0, DEN1=0, DEN0=0
Crossbar A Control Register 0
DEN0 | DMA Enable for XBAR_OUT0 0 (0): DMA disabled 1 (1): DMA enabled |
IEN0 | Interrupt Enable for XBAR_OUT0 0 (0): Interrupt disabled 1 (1): Interrupt enabled |
EDGE0 | Active edge for edge detection on XBAR_OUT0 0 (00): STS0 never asserts 1 (01): STS0 asserts on rising edges of XBAR_OUT0 2 (10): STS0 asserts on falling edges of XBAR_OUT0 3 (11): STS0 asserts on rising and falling edges of XBAR_OUT0 |
STS0 | Edge detection status for XBAR_OUT0 0 (0): Active edge not yet detected on XBAR_OUT0 1 (1): Active edge detected on XBAR_OUT0 |
DEN1 | DMA Enable for XBAR_OUT1 0 (0): DMA disabled 1 (1): DMA enabled |
IEN1 | Interrupt Enable for XBAR_OUT1 0 (0): Interrupt disabled 1 (1): Interrupt enabled |
EDGE1 | Active edge for edge detection on XBAR_OUT1 0 (00): STS1 never asserts 1 (01): STS1 asserts on rising edges of XBAR_OUT1 2 (10): STS1 asserts on falling edges of XBAR_OUT1 3 (11): STS1 asserts on rising and falling edges of XBAR_OUT1 |
STS1 | Edge detection status for XBAR_OUT1 0 (0): Active edge not yet detected on XBAR_OUT1 1 (1): Active edge detected on XBAR_OUT1 |